Improving the Performance of Signal Processor Unit in Cochlear Implants and Providing a Method for its Evaluation

doi:10.30501/jamt.2632.70158

Improving the Performance of Signal Processor Unit in Cochlear Implants and Providing a Method for its Evaluation

10.30501/jamt.2632.70158

Abstract

Cochlear implant is an electronic set which is used as a solution to resolve defects in hearing of deaf people. This device bypasses damaged parts of hearing system and transfers audio data directly to the nerves. As a result, it leads to a partial hearing. Despite lots of efforts and improvements to this device, it does not have ideal performance yet and efforts to improve its performance are still being carried out by many researchers. One of the most important challenges is the ability of testing new methods that are introduced by researchers, as implanting the device on patients without considering all the side effects might be dangerous. Computer simulation is a fair solution for this issue. In fact, if the simulation is performed based on a correct and accurate theory then results will be reliable and consistent with reality. This article describes the steps needed for designing and prototyping a sixteen channel Cochlear Implant signal processor using FPGA. It also proposes a computerized test method in order to evaluate its performance.

Keywords

Cochlear implant

Signal Processor

Hardware Description Language

digital filter